Synthesizable AXI4 crossbar with a full UVM verification environment — RTL, SVA, coverage, stress, and CI.
-
Updated
Aug 21, 2025 - SystemVerilog
Synthesizable AXI4 crossbar with a full UVM verification environment — RTL, SVA, coverage, stress, and CI.
Deterministic hardware verification engine that fails CI when connected components violate electrical or interface contracts.
Socketed PIC32MX programmer PCB for ICSP flashing, USB bootloading, firmware development, and hardware validation.
High-performance discrete-time voltage-mode PID controller for a 100 kHz synchronous buck converter implemented on a Xilinx Spartan-7 FPGA. Features parallel hardware execution, 23-bit fixed-point precision, dual-stage saturation, and cycle-accurate verification. Validated on physical hardware.
Python tool for parsing memory validation logs and generating clean CSV and Markdown reports for server hardware testing workflows.
Wokwi Arduino Uno NTC thermistor temperature validation bench with ADC conversion, Python analysis, plots, and automated PDF reporting.
Basys 3 FPGA avionics visualization and sensor-evidence stack with VGA HUDs, I2C/SPI/UART telemetry bridges, focused Verilog benches, and Vivado flows.
A deterministic, multi-phase C++ PCIe protocol analyzer for decoding TLP traffic, validating transactions, modeling system behavior, and performing fault injection with cross-domain correlation (PCIe, CXL, NVMe).
Automated acceptance toolkit for Linux deep learning GPU servers
ESP32 MCP2515 CAN/J1939 sniffer lab with firmware skeleton, parser, simulation and Python tooling.
Hardware-constrained validation of SRFM metastable structural diagnostics on IBM Quantum systems.
Utility scripts and diagnostics for Arduino boards — modular, reusable, and hardware-focused.
Simulation-first serial diagnostics tool for generic IoT lab workflows with optional pyserial inventory.
Simulation-only validation ladder for mapping neural weight matrices to HRM-style photonic transfer functions.
A framework that ensures that Nitrux runs in a predictable, supportable, and well-understood environment.
Board bring-up, hardware debugging & validation, and event-driven bare-metal firmware (ARM Cortex-M0 LPC11U14F) | UNIFEI PBLE02
Reproducible 261-tap FIR low-pass filter workflow from MATLAB and bit-true Verilog to Vivado implementation and XCZU4EV board validation
Evidence and permission for autonomous labs: expert QC gates, workcell orchestration, provenance, recovery, and honest hardware boundaries.
Production-style Python automation framework for server hardware & SSD validation | pytest | CI/CD | defect classification | GitHub Actions
Windows USB serial diagnostics lab with simulation mode, structured reports and Python tooling.
To associate your repository with the hardware-validation topic, visit your repo's landing page and select "manage topics."