diff --git a/CI/build/conf/cores_config.json b/CI/build/conf/cores_config.json index f16fdf4827..eceb9239c7 100644 --- a/CI/build/conf/cores_config.json +++ b/CI/build/conf/cores_config.json @@ -48,6 +48,9 @@ "GENERIC_C031C4UX", "GENERIC_C031C6TX", "GENERIC_C031F4PX", + "GENERIC_C031K4TX", + "GENERIC_C031K4UX", + "GENERIC_C031K6TX", "GENERIC_C051C6TX", "GENERIC_C051C6UX", "GENERIC_C051C8TX", diff --git a/CI/build/conf/cores_config_ci.json b/CI/build/conf/cores_config_ci.json index 0458794a8d..0f8dcbaa80 100644 --- a/CI/build/conf/cores_config_ci.json +++ b/CI/build/conf/cores_config_ci.json @@ -48,6 +48,9 @@ "GENERIC_C031C4UX", "GENERIC_C031C6TX", "GENERIC_C031F4PX", + "GENERIC_C031K4TX", + "GENERIC_C031K4UX", + "GENERIC_C031K6TX", "GENERIC_C051C6TX", "GENERIC_C051C6UX", "GENERIC_C051C8TX", diff --git a/README.md b/README.md index 9404e80053..c44ff24fee 100644 --- a/README.md +++ b/README.md @@ -238,6 +238,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32C011J4
STM32C011J6 | Generic Board | *2.8.0* | | | :green_heart: | STM32C031C4
STM32C031C6 | Generic Board | *2.5.0* | | | :green_heart: | STM32C031F4
STM32C031F6 | Generic Board | *2.6.0* | | +| :yellow_heart: | STM32C031K4
STM32C031K6 | Generic Board | **3.0.1** | | | :green_heart: | STM32C051C6
STM32C051C8 | Generic Board | *2.12.0* | | | :green_heart: | STM32C071G8
STM32C071GB | Generic Board | *2.11.0* | | | :green_heart: | STM32C071R8
STM32C071RB | Generic Board | *2.9.0* | | diff --git a/boards.txt b/boards.txt index a4fc43865c..1882ab5c68 100644 --- a/boards.txt +++ b/boards.txt @@ -2028,6 +2028,42 @@ GenC0.menu.pnum.GENERIC_C031F6PX.build.product_line=STM32C031xx GenC0.menu.pnum.GENERIC_C031F6PX.build.variant=STM32C0xx/C031F(4-6)P GenC0.menu.pnum.GENERIC_C031F6PX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C031.svd +# Generic C031K4Tx +GenC0.menu.pnum.GENERIC_C031K4TX=Generic C031K4Tx +GenC0.menu.pnum.GENERIC_C031K4TX.upload.maximum_size=16384 +GenC0.menu.pnum.GENERIC_C031K4TX.upload.maximum_data_size=12288 +GenC0.menu.pnum.GENERIC_C031K4TX.build.board=GENERIC_C031K4TX +GenC0.menu.pnum.GENERIC_C031K4TX.build.product_line=STM32C031xx +GenC0.menu.pnum.GENERIC_C031K4TX.build.variant=STM32C0xx/C031K(4-6)(T-U) +GenC0.menu.pnum.GENERIC_C031K4TX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C031.svd + +# Generic C031K6Tx +GenC0.menu.pnum.GENERIC_C031K6TX=Generic C031K6Tx +GenC0.menu.pnum.GENERIC_C031K6TX.upload.maximum_size=32768 +GenC0.menu.pnum.GENERIC_C031K6TX.upload.maximum_data_size=12288 +GenC0.menu.pnum.GENERIC_C031K6TX.build.board=GENERIC_C031K6TX +GenC0.menu.pnum.GENERIC_C031K6TX.build.product_line=STM32C031xx +GenC0.menu.pnum.GENERIC_C031K6TX.build.variant=STM32C0xx/C031K(4-6)(T-U) +GenC0.menu.pnum.GENERIC_C031K6TX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C031.svd + +# Generic C031K4Ux +GenC0.menu.pnum.GENERIC_C031K4UX=Generic C031K4Ux +GenC0.menu.pnum.GENERIC_C031K4UX.upload.maximum_size=16384 +GenC0.menu.pnum.GENERIC_C031K4UX.upload.maximum_data_size=12288 +GenC0.menu.pnum.GENERIC_C031K4UX.build.board=GENERIC_C031K4UX +GenC0.menu.pnum.GENERIC_C031K4UX.build.product_line=STM32C031xx +GenC0.menu.pnum.GENERIC_C031K4UX.build.variant=STM32C0xx/C031K(4-6)(T-U) +GenC0.menu.pnum.GENERIC_C031K4UX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C031.svd + +# Generic C031K6Ux +GenC0.menu.pnum.GENERIC_C031K6UX=Generic C031K6Ux +GenC0.menu.pnum.GENERIC_C031K6UX.upload.maximum_size=32768 +GenC0.menu.pnum.GENERIC_C031K6UX.upload.maximum_data_size=12288 +GenC0.menu.pnum.GENERIC_C031K6UX.build.board=GENERIC_C031K6UX +GenC0.menu.pnum.GENERIC_C031K6UX.build.product_line=STM32C031xx +GenC0.menu.pnum.GENERIC_C031K6UX.build.variant=STM32C0xx/C031K(4-6)(T-U) +GenC0.menu.pnum.GENERIC_C031K6UX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C031.svd + # Generic C051C6Tx GenC0.menu.pnum.GENERIC_C051C6TX=Generic C051C6Tx GenC0.menu.pnum.GENERIC_C051C6TX.upload.maximum_size=32768 diff --git a/cmake/boards_db.cmake b/cmake/boards_db.cmake index 5371b78a12..2695f36a37 100644 --- a/cmake/boards_db.cmake +++ b/cmake/boards_db.cmake @@ -7609,6 +7609,270 @@ add_library(GENERIC_C031F6PX_usb_none INTERFACE) target_compile_options(GENERIC_C031F6PX_usb_none INTERFACE ) +# GENERIC_C031K4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_C031K4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C0xx/C031K(4-6)(T-U)") +set(GENERIC_C031K4TX_MAXSIZE 16384) +set(GENERIC_C031K4TX_MAXDATASIZE 12288) +set(GENERIC_C031K4TX_MCU cortex-m0plus) +set(GENERIC_C031K4TX_FPCONF "-") +add_library(GENERIC_C031K4TX INTERFACE) +target_compile_options(GENERIC_C031K4TX INTERFACE + "SHELL:-DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER" + "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" + -mcpu=${GENERIC_C031K4TX_MCU} +) +target_compile_definitions(GENERIC_C031K4TX INTERFACE + "STM32C0xx" + "ARDUINO_GENERIC_C031K4TX" + "BOARD_NAME=\"GENERIC_C031K4TX\"" + "BOARD_ID=GENERIC_C031K4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_C031K4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/Templates/gcc/ + ${GENERIC_C031K4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_C031K4TX INTERFACE + "LINKER:--default-script=${GENERIC_C031K4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + -mcpu=${GENERIC_C031K4TX_MCU} +) + +add_library(GENERIC_C031K4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_C031K4TX_serial_disabled INTERFACE +) +add_library(GENERIC_C031K4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_C031K4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_C031K4TX_serial_none INTERFACE) +target_compile_options(GENERIC_C031K4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_C031K4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_C031K4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_C031K4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_C031K4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_C031K4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_C031K4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_C031K4TX_usb_none INTERFACE) +target_compile_options(GENERIC_C031K4TX_usb_none INTERFACE +) + +# GENERIC_C031K4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_C031K4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C0xx/C031K(4-6)(T-U)") +set(GENERIC_C031K4UX_MAXSIZE 16384) +set(GENERIC_C031K4UX_MAXDATASIZE 12288) +set(GENERIC_C031K4UX_MCU cortex-m0plus) +set(GENERIC_C031K4UX_FPCONF "-") +add_library(GENERIC_C031K4UX INTERFACE) +target_compile_options(GENERIC_C031K4UX INTERFACE + "SHELL:-DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER" + "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" + -mcpu=${GENERIC_C031K4UX_MCU} +) +target_compile_definitions(GENERIC_C031K4UX INTERFACE + "STM32C0xx" + "ARDUINO_GENERIC_C031K4UX" + "BOARD_NAME=\"GENERIC_C031K4UX\"" + "BOARD_ID=GENERIC_C031K4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_C031K4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/Templates/gcc/ + ${GENERIC_C031K4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_C031K4UX INTERFACE + "LINKER:--default-script=${GENERIC_C031K4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + -mcpu=${GENERIC_C031K4UX_MCU} +) + +add_library(GENERIC_C031K4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_C031K4UX_serial_disabled INTERFACE +) +add_library(GENERIC_C031K4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_C031K4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_C031K4UX_serial_none INTERFACE) +target_compile_options(GENERIC_C031K4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_C031K4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_C031K4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_C031K4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_C031K4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_C031K4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_C031K4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_C031K4UX_usb_none INTERFACE) +target_compile_options(GENERIC_C031K4UX_usb_none INTERFACE +) + +# GENERIC_C031K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_C031K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C0xx/C031K(4-6)(T-U)") +set(GENERIC_C031K6TX_MAXSIZE 32768) +set(GENERIC_C031K6TX_MAXDATASIZE 12288) +set(GENERIC_C031K6TX_MCU cortex-m0plus) +set(GENERIC_C031K6TX_FPCONF "-") +add_library(GENERIC_C031K6TX INTERFACE) +target_compile_options(GENERIC_C031K6TX INTERFACE + "SHELL:-DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER" + "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" + -mcpu=${GENERIC_C031K6TX_MCU} +) +target_compile_definitions(GENERIC_C031K6TX INTERFACE + "STM32C0xx" + "ARDUINO_GENERIC_C031K6TX" + "BOARD_NAME=\"GENERIC_C031K6TX\"" + "BOARD_ID=GENERIC_C031K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_C031K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/Templates/gcc/ + ${GENERIC_C031K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_C031K6TX INTERFACE + "LINKER:--default-script=${GENERIC_C031K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + -mcpu=${GENERIC_C031K6TX_MCU} +) + +add_library(GENERIC_C031K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_C031K6TX_serial_disabled INTERFACE +) +add_library(GENERIC_C031K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_C031K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_C031K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_C031K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_C031K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_C031K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_C031K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_C031K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_C031K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_C031K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_C031K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_C031K6TX_usb_none INTERFACE +) + +# GENERIC_C031K6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_C031K6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C0xx/C031K(4-6)(T-U)") +set(GENERIC_C031K6UX_MAXSIZE 32768) +set(GENERIC_C031K6UX_MAXDATASIZE 12288) +set(GENERIC_C031K6UX_MCU cortex-m0plus) +set(GENERIC_C031K6UX_FPCONF "-") +add_library(GENERIC_C031K6UX INTERFACE) +target_compile_options(GENERIC_C031K6UX INTERFACE + "SHELL:-DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER" + "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" + -mcpu=${GENERIC_C031K6UX_MCU} +) +target_compile_definitions(GENERIC_C031K6UX INTERFACE + "STM32C0xx" + "ARDUINO_GENERIC_C031K6UX" + "BOARD_NAME=\"GENERIC_C031K6UX\"" + "BOARD_ID=GENERIC_C031K6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_C031K6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/Templates/gcc/ + ${GENERIC_C031K6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_C031K6UX INTERFACE + "LINKER:--default-script=${GENERIC_C031K6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + -mcpu=${GENERIC_C031K6UX_MCU} +) + +add_library(GENERIC_C031K6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_C031K6UX_serial_disabled INTERFACE +) +add_library(GENERIC_C031K6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_C031K6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_C031K6UX_serial_none INTERFACE) +target_compile_options(GENERIC_C031K6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_C031K6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_C031K6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_C031K6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_C031K6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_C031K6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_C031K6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_C031K6UX_usb_none INTERFACE) +target_compile_options(GENERIC_C031K6UX_usb_none INTERFACE +) + # GENERIC_C051C6TX # ----------------------------------------------------------------------------- diff --git a/variants/STM32C0xx/C031K(4-6)(T-U)/generic_clock.c b/variants/STM32C0xx/C031K(4-6)(T-U)/generic_clock.c index 1afa230a05..9cb4c6ee4e 100644 --- a/variants/STM32C0xx/C031K(4-6)(T-U)/generic_clock.c +++ b/variants/STM32C0xx/C031K(4-6)(T-U)/generic_clock.c @@ -13,6 +13,7 @@ #if defined(ARDUINO_GENERIC_C031K4TX) || defined(ARDUINO_GENERIC_C031K4UX) ||\ defined(ARDUINO_GENERIC_C031K6TX) || defined(ARDUINO_GENERIC_C031K6UX) #include "pins_arduino.h" +#include "stm32yyxx_ll_utils.h" /** * @brief System Clock Configuration @@ -21,8 +22,32 @@ */ WEAK void SystemClock_Config(void) { - /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); + + /* HSI configuration and activation */ + LL_RCC_HSI_Enable(); + while (LL_RCC_HSI_IsReady() != 1) { + } + + LL_RCC_HSI_SetCalibTrimming(64); + LL_RCC_SetHSIDiv(LL_RCC_HSI_DIV_1); + /* Set AHB prescaler*/ + LL_RCC_SetAHBPrescaler(LL_RCC_HCLK_DIV_1); + + /* Sysclk activation on the HSI */ + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI); + while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI) { + } + + /* Set APB1 prescaler*/ + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */ + LL_SetSystemCoreClock(48000000); + + /* Update the time base */ + if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) { + Error_Handler(); + } } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32C0xx/C031K(4-6)(T-U)/ldscript.ld b/variants/STM32C0xx/C031K(4-6)(T-U)/ldscript.ld new file mode 100644 index 0000000000..b233a4579e --- /dev/null +++ b/variants/STM32C0xx/C031K(4-6)(T-U)/ldscript.ld @@ -0,0 +1,188 @@ +/* +****************************************************************************** +** +** @file : LinkerScript.ld +** +** @author : Auto-generated by STM32CubeIDE +** +** @brief : Linker script for STM32C031K6Tx Device from STM32C0 series +** 32KBytes FLASH +** 12KBytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +****************************************************************************** +** @attention +** +** Copyright (c) 2026 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +****************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +}